The invention relates to the field of communication systems. More particularly, the present invention relates to timing recovery loops used in Gaussian Minimum Shift Keying (GMSK) receivers for recovering transmitted data.
Communication systems communicate signals using a variety of modulation methods. One such modulation method is Gaussian Minimum Shift Keying (GMSK). GMSK is a form of continuous phase modulation method exhibiting compact spectral occupancy and a constant envelope, thus making it compatible with a non-linear power amplifier operation without the concomitant spectral re-growth associated with non-constant envelope signals. As demands for channel capacity increase, the need for bandwidth-power efficiency with constant envelope modulation techniques is also increased. The GMSK modulation technique satisfies these two requirements. The GMSK modulation technique exhibits a constant envelope waveform with the occupied bandwidth determined by the BT product, where B denotes the 3 dB bandwidth of the baseband Gaussian filter, and T is the bit duration. These attributes render GMSK an attractive modulation scheme in communication systems where only a limited system bandwidth is available.
A formatted data signal, such as a non-return to zero (NRZ) data stream of a series of respective data pulses, is passed through a Gaussian filter and an integrator providing a continuous output for modulating the phase of the carrier signal. The output of the Gaussian filter is a series of Gaussian filter pulse responses that are passed through the integrator providing a continuous voltage signal to a phase modulator that phase modulates the carrier signal. Each of the predetermined number of prior data pulses contribute a signal component to the current output of the integrator at the current bit time. That is, the continuous output of the integrator at each bit time depends upon a predetermined number of prior data bits, that is, a predetermined number of prior data pulses that are inputted into the Gaussian filter and integrator, and hence the Gaussian filter and integrator have a memory represented by signal components from the prior data bits, or data pulses. This memory is known as intersymbol interference where a first data pulse is a symbol communicated as a signal having pulse filter response components lying within the time duration of the signal of a subsequent symbol of a subsequent data pulse.
In typical implementations, the NRZ data stream is a series of pulses having +/xe2x88x921V voltage levels. Each +1V or xe2x88x921V pulse contributes to a phase response that is accumulated over time. The Gaussian filter provides pulse responses to the +1V or xe2x88x921V data pulses that are accumulated through the integrator. Each of the pulse responses is integrated to provide a respective phase shift of +/xe2x88x92xcfx80/2. The integrator provides a modulo 2xcfx80 accumulated phase response of all of the +/xe2x88x92xcfx80/2 phase responses respectively for each Gaussian filter pulse response. The integrator output is hence an accumulated phase response from a predetermined number of prior data bits. The resulting modulo xcfx80/2 phase response is hence a continuous accumulated phase output that is a function of the prior predetermined number of data bits and resulting Gaussian filter pulse responses. The continuous accumulated phase integrator output is inputted into the phase modulator modulating the carrier signal for providing a transmitted GMSK phase modulated carrier signal where the modulated phase is the accumulated phase reduced modulo 2xcfx80 representing all the previous data bits.
The GMSK phase modulated signal arrives at a receiver arbitrarily in time creating a carrier phase between the arrived carrier signal and a locally generated carrier signal used for coherent demodulation reception. Upon reception of the GMSK signal, the carrier phase must be firstly determined for demodulating the GMSK signal so that the resulting accumulated data phase can be determined to then enable reconstruction of the data stream at the receiver. Hence, determining the carrier phase is essential in coherent communications so that the carrier phase modulated by the data stream can be determined to recover the data. The current phase is the sum of a carrier phase and the accumulated data phase of the previous data channel bits.
The GMSK receiver includes a GMSK carrier tracking loop for tracking the carrier phase and frequency estimates for demodulating the GMSK carrier signal into the GMSK baseband signal. After carrier synchronization and demodulation, the GMSK carrier tracking loop provides a replica of the Gaussian filter response that is a time varying analog signal upon which the Gaussian time recovery loop operates to derive a timing signal for bit synchronization for reconstructing the data sequence.
Various forms of GMSK timing recovery loops using squaring loops have been described. GMSK Carrier and timing recovery techniques have used squaring or costas loops. GMSK modulators and demodulators operate at high bit signal to noise ratios (BSNR), that is, with BSNR greater than zero Db, and with Gaussian bandwidth-bit time duration products BT greater than 0.25. The GMSK demodulator has been used for carrier and bit timing synchronization under these conditions. For small values of BT and low BSNR, the carrier and bit synchronization for GMSK demodulators become extremely difficult. The loss due to squaring and self-noise due to intersymbol interference is unavoidable degrading system performance. Digital GMSK tracking loops do not perform very well in the presence of non-random data patterns where the discrete components for carrier and clock recovery may vanish. For data-derived timing recovery techniques which do not utilize squaring loops, the performance of the bit synchronizing tracking transition loops depends heavily on the BSNR and BT. For low BSNR and small BT, timing recovery becomes extremely difficult because of intersymbol interference and non-distinguishable bit transitions. For recovery of the carrier and bit timing information, the performance degradation, in terms of the carrier phase and timing jitter, associated with the existing schemes, are quite high at very low BSNR and small values of BT.
The GMSK carrier tracking loop has employed reverse modulation techniques for recovering the carrier phase coherently. Reverse modulation technique for tracking the GMSK signal with BT=0.3 use a phase locked loop with second order loop filter employed by the reverse modulator. The received signal R(t) is received by a reverse modulator in the GMSK carrier tracking loop to create the carrier tone fc that is acquired and tracked by the phase lock loop. The GMSK carrier tracking loop tracks the carrier tone fc to create a carrier reference that is generated by the phase lock loop for carrier demodulation of the received signal R(t), as is well known in the art. The reverse modulation techniques are used to avoid squaring loss associated with the costas or squaring loop.
For binary phase shift keying (BPSK), quadrature phase shift keying (QPSK), and M-ary phase shift keying, the communication signal is a square wave in nature and digital tracking transition loops (DTTL) are used for bit synchronization. That is, the DTTL is designed to track the baseband square waves of demodulated received signals. The DTTL performs optimally when the square wave signals are received in the presence of the additive white Gaussian noise. Digital transition tracking loops as part of a GMSK timing recover loop have been applied to demodulated GMSK received signals that are highly distorted square wave signals. The GMSK timing recovery loop operates upon the demodulated received GMSK signal using forms of a squaring loop or frequency doubler followed by a phase locked loop for bit timing recovery. The timing clock for timing recovery in the GMSK timing recovery loop is created by squaring the received demodulated signal, and the phase lock loop is tuned to the clock frequency for bit timing recovery. The demodulated GMSK received baseband signal containing data information, however, is severely distorted due to the Gaussian filtering at small BT products where the 3 dB cut-off frequency of the Gaussian filter is smaller than the data rate of the baseband signaling. Therefore, for small BT products of GMSK Gaussian filters, both prior GMSK timing recovery loops and DTTLs are not capable of recovering the timing information based on the received analog Gaussian filter response waveform. These and other disadvantages are solved or reduced using the invention.
An object of the invention is to improve the bit error rate of Gaussian minimum shift keying (GMSK) demodulators.
Another object of the invention is to reduce data bit timing jitter of GMSK demodulators.
Another object of the invention is to provide a GMSK timing recovery loop including a digital tracking transition loop for bit synchronization of a received data sequence.
Another object of the invention is to hard limit a GMSK demodulated received signal for operating a digital tracking transition loop at baseband for the reduction of data bit timing jitter.
Another object of the invention is to provide GMSK timing recovery loop operating at baseband for timing synchronization of a received digital bit sequence.
The invention is directed to an improved GMSK timing recover loop in a GMSK receiver for providing a bit synchronization timing signal that is used for reconstructing a data sequence. The GMSK timing recovery loop includes a hard limited and a conventional digital tracking transition loop that has been used in binary phase shift keying (BPSK) and quadrature pulse shift keying (QPSK). The improved GMSK timing recovery loops operates at baseband and provides reduced bit timing synchronization jitter for reducing bit error rates. The improvement lies in the combination of a hard limiter and a digital transition tracking loop within the timing recovery loop where the synchronization performance is insensitive to the values of BT and low bit signal to noise ratios (BSNR). The improved GMSK timing recovery loop solves the GMSK bit synchronization problems for GMSK links with a low channel BSNR and small BT system using a conventional digital tracking transition loop coupled to a hard limiter for bit timing recovery. Additionally, the GMSK carrier tracking loop preferably is a reverse modulation carrier tracking loop for improved carrier tracking.
The improved GMSK timing recovery loop enables recovery of the bit timing signal xcfx84b(t) with high accuracy at low BSNR and small BT product, and has the advantage of negligible loss due to non-random data patterns. Another advantage associated with GMSK timing recovery loop is that it adopts the well-known digital transition tracking loop (DTTL) used in M-ary PSK systems with a modification of adding the hard limiter. The GMSK system includes the modulator and the demodulator between which is transmitted the GMSK signal. The demodulator includes a carrier tracking loop for providing a GMSK demodulated received signal Ro(t) and a bit timing recovery loop for providing the bit timing signal xcfx84b(t). The carrier tracking loop preferably employs the reverse modulation. The GMSK timing recovery loop performance employs the hard limiter adjusted by a bit timing error signal xcfx84e(t) for improved insensitivity to the values of BT while operating at low BSNR. The GMSK timing recovery loop take advantage of the observation that the cosine of the baseband GMSK signal has zero-crossings at multiples of the bit duration. The hard-limiter is used to create the NRZ data stream clocking signal that has the zero-crossings at multiples of the bit duration. The digital transition tracking loop is then used to track the zero-crossings of the NRZ data stream clocking signal from the received demodulated GMSK signal, and the bit timing signal is then generated by the DTTL with less jitter for improved data detection. In the GMSK timing recovery loop, the hard limiter is adjusted by the bit timing error signal xcfx84e(t) to reduce jitter in tracking the NRZ data stream. Hence, the digital transition tracking loop tracks the adjusted zero-crossings of the NRZ data stream, and the reduced jitter bit timing signal xcfx84b(t) is then generated for accurate data detection.
During data detection, the bit timing error signal xcfx84e(t), provided by the DTTL, pre-adjusts the zero crossing of the hard clock signal from the hard limiter for driving the DTTL at precise bit periods. The bit timing error signal xcfx84b(t) provided by the DTTL is used by the hard limiter to adjust the zero-crossings of the received demodulated signal Ro(t) to produce accurate timing transitions for the DTTL as part of a feedback approach. The bit timing error signal adjusts the zero-crossings of the received demodulated signal Ro(t) to produce accurate transitions for the hard limiter as tone tracking within a feedback loop.
Initially, the hard limiter provides the NRZ square wave transition clocking signal corresponding to the zero crossings of the received demodulated signal having time durations equaling to multiples of the bit period with the DTTL functioning to divide each square wave into an integer number of square waves corresponding to the number of bit periods without the hard limiter clocking signal in the feedback loop and without the transitions being adjusted. This open loop operation of the hard limiter is initially used to drive the DTTL in open loop with no adjustment of the zero-crossings of the demodulated received signal Ro(t) to firstly reduce the bit timing error signal xcfx84e(t) of a low predetermined value so that the bit timing error is less than xc2xd of a bit period. After this initialization, when the bit timing error signal xcfx84e(t) is reduced, the reduced bit timing error signal then secondly adjusts the received demodulated signal zero crossing transition for further reducing the jitter of the bit timing signal xcfx84b(t). For bit timing recovery at low BSNR and small BT, the feedback connection of the bit timing error signal xcfx84e(t) reduces the amount of jitter of the bit timing signal xcfx84b(t), while the initial non-feedback configuration is advantageous for initial acquisition. These and other advantages will become more apparent from the following detailed description of the preferred embodiment.